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EDA & CAD tools

EDA & CAD tools
Synopsys drives 2nm analog IP, photonics with TSMC – update
Synopsys drives 2nm analog IP, photonics with TSMC – update
Technology News |
Synopsys and TSMC are developing an end-to-end electronic and silicon photonics reference flow alongside developing analog IP on TSMC’s 2nm…
ZeroPoint’s DenseMem compression saves power in the datacenter
ZeroPoint’s DenseMem compression saves power in the datacenter
Business news |
ZeroPoint Technologies AB (Gothenburg, Sweden) has announced it has licensed DenseMem compression for CXL memory to a “major global semiconductor…
OpenLane 2 boost for custom open source chip design
OpenLane 2 boost for custom open source chip design
Business news |
Efabless has releases version 2 of the OpenLane open source electronic design automation tools that allows the integration of proprietary…
Analog Bits looks to 2nm power IP as it shows 3nm test chips
Analog Bits looks to 2nm power IP as it shows 3nm test chips
Technology News |
Analog Bits is demonstrating test chips for low drop out IP, power supply droop detectors and embedded clock LC PLL’s…

Semiconductor IP market kept growing in 2023
Semiconductor IP market kept growing in 2023
News |
Despite a shrinking chip market, revenues from design IP grew to US$7.04 billion in 2023, an increase of 5.8 percent, according to Eric Esteve of analyst IPnest. The fall in…
Intel develops custom AI tool for SoC thermal sensor placement
Intel develops custom AI tool for SoC thermal sensor placement
Technology News |
An augmented intelligence tool developed in-house by Intel engineers is providing data on sensor placement in system-on-chip (SoC) designs in just minutes. For decades, determining exactly where to place heat-sensitive…
Call for papers for DVCon Europe
Call for papers for DVCon Europe
Business news |
The Design and Verification Conference (DVcon Europe) is accepting submissions of industrial and academic papers, tutorials, and panels with highly technical content reflecting real-life experiences as well as research topics.
Sondrel CEO steps down as chip firm faces re-organization
Sondrel CEO steps down as chip firm faces re-organization
Business news |
Graham Curren, is standing down as CEO of loss-making ASIC design services company Sondrel Holdings plc. The company has received financial support from ROX Equity Partners Ltd. and is now…
ZeroASIC launches simplified open source FPGA toolchain
ZeroASIC launches simplified open source FPGA toolchain
Technology News |
ZeroASIC has launched a lightweight open source FPGA toolchain to automate circuit design using a simple Python script. The Logik FPGA toolchain is powered by the ZeroASIC Silicon Compiler framework to…
Low power memory compiler for 16nm FinFET designs
Low power memory compiler for 16nm FinFET designs
Technology News |
SureCore in the UK has ported its low power SRAM memory compiler for 16nm FinFET process technologies. The 16nm FinFET port of the SureCore PowerMiser memory compiler will enable developers…
Czech secure element uses RISC-V
Czech secure element uses RISC-V
New Products |
Tropic Square sro (Prague, Czech Republic) will be showing its Tropic01 secure element chip at the Embedded World exhibition. Tropic Square is a fabless chip company founded in 2020. The…
Synopsys looks to AI, 3D die for trillion transistor designs
Synopsys looks to AI, 3D die for trillion transistor designs
Feature articles |
AI boosting the development of multi-die designs will be key to achieving trillion transistor devices says the CEO of design tool pioneer Synopsys. “We see three major growth drivers for…
TSMC, Synopsys using Nvidia’s AI-capable cuLitho for production
TSMC, Synopsys using Nvidia’s AI-capable cuLitho for production
Technology News |
Foundry TSMC and EDA tool supplier Synopsys are going into production with Nvidia’s computational lithography platform to accelerate the process by up to a factor of 60. Nvidia announced its…
Big 3 EDA back ARM automotive chiplet push
Big 3 EDA back ARM automotive chiplet push
Business news |
Cadence, Siemens and Synopsys are aiming to boost the use of ARM’s automotive cores in chiplets and system on chip designs with a series of tools. However Synopsys is so…
Arteris expands Ncore cache coherent interconnect IP
Arteris expands Ncore cache coherent interconnect IP
New Products |
Arteris is now supporting the ARMv9 cores and CHI-E interconnect with its latest cache coherent IP. Version 3.6 of the Ncore interconnect IP developed by Arteris is aimed at low…
Cadence moves into structural analysis with $1.2bn European buy
Cadence moves into structural analysis with $1.2bn European buy
Business news |
Cadence Design Systems is to acquire European tool developer Beta CAE Systems in a strategic $1.2bn move into structural analysis. The deal with Beta CAE in Lucerne, Switzerland, adds more…
sureCore optimises AI memory IP for low power
sureCore optimises AI memory IP for low power
News |
sureCore in the UK has developed a new version of its low power memory IP to cut the thermal load in Large Language Model (LLM) AI applications. Following move into…
Modular PCIe Gen 6 Controller IP supports diverse modes
Modular PCIe Gen 6 Controller IP supports diverse modes
Technology News |
US startup SignatureIP has launched modular controller IP for the next generation PCIe 6.0 protocol The modular PCIe 6.0 IP natively integrates with SignatureIP’s iNoCulator tool for network on chip…
Siemens claims breakthrough with 40bn gates of emulation
Siemens claims breakthrough with 40bn gates of emulation
Technology News |
Siemens has re-architected its emulation and hardware assisted verification systems in a major change to emulate designs with up to 40bn gates. The Veloce CS system has been developed by…
AI design of PCBs raises US$10 million for startup Quilter
AI design of PCBs raises US$10 million for startup Quilter
Business news |
Circuit board design startup Quilter Inc. (Menlo Park, Calif.) has raised US$10 million to help it automate circuit board design. It is not yet clear whether the company’s business model…
imec launches pathfinding Process Design Kit for 2nm chip designs
imec launches pathfinding Process Design Kit for 2nm chip designs
Technology News |
Belgian research lab has developed the first public process design kit (PDK) for next generation 2nm chip designs. imec is launching the 2nm PDK at the 2024 IEEE International Solid-State…
Thalia adds 12nm FINFET support to design migration tool
Thalia adds 12nm FINFET support to design migration tool
New Products |
Thalia in Wales has updated its analog, mixed signal and RF IP design migration tool to support 12nm FINFET designs Version 24.1 of Thalia’s AMALIA 24.1 includes support for the…
Renesas to buy PCB design software firm Altium for US$5.9 billion
Renesas to buy PCB design software firm Altium for US$5.9 billion
Business news |
Japanese chip company Renesas Electronics Corp. has said it plans to acquire PCB design software firm Altium Ltd. for Aus$9.1 billion (about US$5.9 billion). The move is an extension of…
Arm shares jump 50% on AI, China boosts to results
Arm shares jump 50% on AI, China boosts to results
Business news |
Arm’s share price jumped by 48 percent as the processor IP licensor announced a solid quarter boosted by demand for artificial intelligence processors and a jump in sales to China.
Accelera group to create mixed-signal interface SystemVerilog extension  
Accelera group to create mixed-signal interface SystemVerilog extension  
News |
The Accellera Systems Initiative has formed a working group to tackle a key challenge for mixed signal system on chip designs. The Working Group for SystemVerilog Mixed-Signal Interface Types (SystemVerilog…
Round 6 opens for Tiny Tapeout low cost ASICs
Round 6 opens for Tiny Tapeout low cost ASICs
Business news |
Low cost ASIC project Tiny Tapeout 6 is open for submissions, adding power gating for all designs, mixed signal support and analog pins. Tiny Tapeout 6 has the same space,…
First secure thermal simulation models for chiplet boost
First secure thermal simulation models for chiplet boost
Technology News |
Siemens Digital Industries Software is using Italian technology for the first high-fidelity thermal simulation models that can be shared in the electronic supply chain while protecting semiconductor OEM’s intellectual property.
Tool boost for crystal oscillator designs
Tool boost for crystal oscillator designs
Business news |
Interchip in Japan has used multiple analog and mixed-signal EDA tools from Siemens to generate silicon-accurate simulations of its newest high precision crystal oscillators. The Siemens Analog FastSPICE platform and…


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